Add_full

由2個半加法器與1個OR閘所組成

module Add_full(a,b,c_in,sum,c_out);
intput a,b,c_in;
output sum,c_out;
wire w1,w2,w3
add_half M1(w1,w2,a,b);
add_half M2(sum,w3,w1,c_in);
or(c_out,w2,w3);
endmodule
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